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Nvidia's networking club seeks to establish open-source GPU interconnect standards to compete with vendor lock-in.

GPU fabric standardization could lower barriers to non-Nvidia accelerator adoption and reduce interconnect cost premiums.
Trade pressSlicast · October 30, 2024 · Global · Source: theregister.com
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The Ultra Accelerator Link Consortium, an alliance of enterprise technology vendors explicitly excluding Nvidia to advance a shared industry standard for accelerator-to-accelerator links, has announced it will deliver its specification in the first quarter of 2025. The group, which declared its existence in May with the goal to "define and establish an open industry standard that will enable AI accelerators to communicate more effectively," includes AMD, AWS, Broadcom, Cisco, Google, HPE, Intel, Meta, Microsoft, and Astera Labs. This week, the consortium announced it has completed its incorporation and opened its membership to additional entities.

The consortium's formation reflects broader frustration with Nvidia's dominance in AI infrastructure. Nvidia's networking business has grown to over a $14 billion annual run rate—a figure approached only by vendors like Cisco and Huawei in datacenter sales—driven largely by proprietary offerings including InfiniBand and NVLink GPU-to-GPU connections that competitors cannot easily access. The UALink members seek to address this by promoting "an interconnect based upon open standards [to] enable system OEMs, IT professionals and system integrators to create a pathway for easier integration, greater flexibility and scalability of their AI-connected datacenters." Vendors pursue open standards because they enable broader market participation, while buyers prefer contested markets that typically drive prices down.

The consortium's version 1.0 specification will offer technical capabilities exceeding Nvidia's current offerings. The standard "will enable up to 200Gbit/sec per lane scale-up connection for up to 1024 accelerators within an AI pod"—significantly faster than the 112Gbit/sec possible over Nvidia's NVLink and substantially beyond PCIe 5 performance. While the specification will emerge for general review in the first quarter of 2025, the consortium acknowledged the timeline between standardization and actual hardware deployment may stretch months or years.

Nvidia has publicly downplayed UALink's competitive threat. CEO Jensen Huang stated during Taiwan's Computex exhibition last May that "By the time the first gen of UALink comes out, we will be at NVLink seven or eight." However, Nvidia has also demonstrated alignment with open standards initiatives, recently highlighting its Spectrum X Ethernet offering's deployment in the 100,000-GPU AI training cluster built by Elon Musk's xAI.

The consortium formally marked its progress with the Q1 2025 specification release milestone. UALink Consortium chair Kurtis Bowman stated: "The release of the UALink 1.0 specification in Q1 2025 represents an important milestone as it will establish an open industry standard enabling AI accelerators and switches to communicate more effectively, expand memory access to meet large AI model requirements and demonstrate the benefits of industry collaboration."

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Nvidia's networking club seeks to establish… · Slicast