Intel launched Xeon Max CPU and Max Series GPU designed for high-performance computing applications.

Intel on Wednesday formally introduced the Xeon CPU Max Series, formerly known as Sapphire Rapids HBM, and the Data Center GPU Max Series, formerly known as Ponte Vecchio, as part of its strategy to compete in high-performance computing workloads. These chips are set to arrive in early 2023 alongside the vanilla 4th generation Xeon Scalable CPUs and will power the US Department of Energy's long-delayed Aurora supercomputer, which is expected to become the country's second exascale supercomputer and one of the world's fastest. Jeff McVeigh, head of Intel's Super Compute Group, said the Max name represents the company's desire to "maximize the bandwidth, compute and other capabilities for a wide range of HPC applications." While acknowledging delays in commercializing the chips, McVeigh stated, "We're always going to be pushing the envelope. Sometimes that causes us to maybe not achieve it, but we're doing that in service of helping our developers, helping the ecosystem to help solve [the world's] biggest challenges."

The Xeon Max Series will pack up to 56 performance cores based on the Golden Cove microarchitecture found in Intel's 12th-Gen Core CPUs. With a thermal design power of 350W, the chips will include 20 accelerators for artificial intelligence and HPC workloads, including Intel Advanced Vector Extensions 512 (AVX-512), Intel Deep Learning Boost (DL Boost), Intel Data Streaming Accelerator (DSA), and Intel Advanced Matrix Extensions (AMX). The chips will support DDR5, PCIe 5.0, and Compute Express Link (CXL) 1.1, which will enable memory to be directly attached to the CPU over PCIe 5.0. Over 30 system designs for the Xeon Max are coming from 12 vendors, including Hewlett Packard Enterprise, Dell, Lenovo, and Supermicro.

The defining feature of the Xeon Max is its inclusion of 64GB of HBM2e memory, providing roughly 1TB/s of memory bandwidth and more than 1GB per core. This makes it the world's first x86 CPU with HBM, building on Fujitsu's Arm-based A64FX, which powers one of the world's fastest supercomputers in Japan. A dual-socket server with two Xeon Max CPUs will pack 128GB of HBM total. The memory can be configured in three modes: HBM only mode for maximum efficiency with no code changes needed, HBM flat mode where HBM and DDR act as separate memory regions with code modifications required, and HBM caching mode where HBM acts as a cache for DDR without requiring code changes. McVeigh claimed that Xeon Max delivers major improvements in performance per watt over AMD's Epyc 7773X; with DDR5 memory installed, Intel said a Xeon Max-based system uses 63 percent lower power than the Epyc-based system for the High Performance Conjugate Gradients benchmark, and 67 percent less power with HBM only.

Intel claims the Xeon Max delivers significant performance advantages in competitive benchmarks. With AVX-512, Intel claimed a Xeon Max-based system can provide double the deep learning training performance of a system using AMD's Epyc 7763 CPU using the MLPerf DeepCAM benchmark, while with AMX, the company said the Xeon Max system can provide 3.6 times faster performance. Intel shared several other performance comparisons showing a Xeon Max system was anywhere from 20 percent to 4.8 times faster than an Epyc-based system depending on the HPC workload, though AMD is planning a successor to its Epyc chips, code-named Genoa-X, which may arrive sometime next year or 2024. The Data Center GPU Max Series, Intel's competitor to datacenter GPUs from Nvidia and AMD, is being called the company's "highest density processor" because of how it packs more than 100 billion transistors into a system-on-package comprising 47 chiplets, known as "tiles" in Intel lingo. More than 15 designs for the Data Center GPU Max Series are coming from five vendors.