AMD announced enhanced Epyc CPUs leveraging Xilinx technology integration post-acquisition.

AMD's plans to integrate AI functionality from its Xilinx FPGAs with its Epyc server microprocessors present significant opportunities for systems builders and datacenter operators. Glenn O'Donnell, research director at Forrester, explained that "the more you can put on the same die or on the same package, the better." One of the biggest benefits of integrating dedicated accelerators like Xilinx's AI engine onto the CPU package is power consumption. As O'Donnell noted, "If you can do it on chip or on package, it's going to be a lot more efficient," since it takes considerable power to move data on and off the chip. This focus on power efficiency aligns with AMD CTO Mark Papermaster's stated goal of delivering a 30-fold increase in power efficiency across the company's high-performance compute portfolio by 2025.

Power efficiency carries significant implications for datacenter operations beyond immediate chip performance. Greater efficiency reduces waste heat generation, which directly impacts cooling costs. As O'Donnell explained, "Something that's hard to cool means a lot of the electrical power you're drawing is just going up in smoke. It's generating heat instead of doing compute." According to Dell'Oro Group analyst Lucas Beran, as much as 40 percent of datacenter power consumption today can be directly attributed to keeping systems cool. As chipmakers push toward greater power densities necessary for AI and ML workloads, thermal design power continues to rise—Nvidia's latest GPUs, for example, are now available in configurations up to 700 watts.

Interestingly, O'Donnell believes EPYC chips with integrated AI processing will see more immediate adoption at the edge rather than in traditional datacenters. "That's where a lot of the demand is going to go. Datacenter is big, but I think edge is going to be much, much bigger—orders of magnitude bigger," he said. However, this presents a critical challenge: as O'Donnell noted, "we need the right kind of compute capability out at the edge, and it's not necessarily the same kind thing that's going to be in the datacenter." The primary threat in this space comes from highly-efficient Arm-based processors. "When you look at what's going on, having an Arm-based architecture in some ways, has a competitive advantage because at the edge, power consumption becomes even more important," O'Donnell observed, adding that "I see Arm being the big killer battlefront, precisely because it's more energy efficient."

AMD's acquisition of networking startup Pensando for $1.9 billion suggests further integration efforts are planned. While the purchase positions AMD to compete with Intel and Nvidia in the smartNIC and data processing unit space, the technology could also be integrated into AMD's CPUs. O'Donnell sees this as logical strategy: "Why would you buy a company like that and not try to do something like that." Pensando's DPU technology has the potential to vastly improve chip interconnects and enable much denser compute platforms. "If you can put that interconnect down as close to the silicon as possible, you now have an interconnect for multiprocessor systems that blows the doors off anything that exists today," O'Donnell stated.

Other semiconductor vendors are pursuing similar integration strategies. Intel's Sapphire Rapids Xeon Scalable processors, expected in the first half of 2022, will feature a chiplet architecture that includes accelerator tiles such as GPUs packaged as dedicated chiplet dies. Meanwhile, Nvidia announced at GTC this spring that it integrated a ConnectX7 smartNIC into its H100 line of GPUs to eliminate network bottlenecks in applications like multi-node AI training and 5G signal processing.