Nvidia's B200 and upcoming Rubin GPUs represent the next generation of AI accelerators competing against Tesla's Dojo custom silicon.
NVIDIA's chip roadmap progresses from the B200, part of the Blackwell architecture, to the Rubin architecture, with hints of potential ultra chips or new architectures in the future. The B200 was announced in March 2024 at NVIDIA's GTC keynote and is designed for AI and data center applications. Fabricated on TSMC's 4NP node, an enhanced version of the 4N node, the B200 delivers significant performance gains with power consumption up to 1000W and AI compute performance of 9 petaFLOPS of FP4 precision, representing a substantial leap in compute power and efficiency for AI workloads.
The next generation Rubin architecture is NVIDIA's major step beyond Blackwell, anticipated to launch in late 2025 or early 2026 and fabricated on TSMC's 3nm process node. This shift promises increased transistor density, enhanced performance, and improved power efficiency critical for next-generation AI and compute tasks. Beyond Rubin, information becomes speculative, with hints of an ultra chip variant and entirely new architectures that could involve even more advanced process nodes such as 2nm or novel architectural designs, though specifics remain unavailable at this time.
Tesla's Dojo supercomputer roadmap parallels NVIDIA's advancement trajectory. The current Dojo 1 generation uses the D1 chip, fabricated on TSMC's 7nm process and operational today. At the late 2024 All in Summit, Elon Musk expected the Dojo 2 chip to be in high volume production by late 2025, with the system competitive with advanced chips like NVIDIA's B200. Musk also mentioned the Dojo 3 chip in the context of late 2026, indicating that its performance would be critical to assessing the long-term success of the Dojo project, suggesting that Tesla would need to evaluate Dojo 3 around that time to determine if the Dojo initiative would be "really good and an ongoing success." Future iterations Dojo 3 and Dojo 4 are expected around 2026–2027 and 2027–2028 respectively, with speculative placements reflecting incremental upgrades in chip performance and possible adoption of more advanced process nodes.
Both NVIDIA and Tesla rely on TSMC for chip fabrication, with production volume dependent on TSMC's wafer capacity and advanced manufacturing capabilities. TSMC's 2024 capital expenditure of approximately $28 billion includes significant allocation to advanced nodes and packaging, with new facilities such as the AP6 fab dedicated to scaling production. Advanced chips like NVIDIA's B200 and Tesla's Dojo require CoWoS-L packaging for high-density integration, and TSMC is ramping up this capacity to meet demand while also developing technologies like InFO_SoW for multi-chip integration. While exact wafer counts are not public, TSMC's investments suggest it can support millions of advanced chips annually, with a single 3nm fab potentially producing tens of thousands of wafers monthly once fully operational, translating to significant chip volumes for both NVIDIA and Tesla, constrained primarily by packaging capacity rather than wafer output.